Phenom II X4 800 Series Can Address Full 6 MB L3 Cache

[Picard]

While AMD played smart in diverting all its engineering resources in designing only one core: the Deneb / Shanghai, and then carving out umpteen SKUs out of them based on disabling cores, and/or setting L3 cache amounts, its implementation seems to be shoddy, to the least. Weeks ago, a Korean enthusiast found an easy way to unlock the factory-disabled fourth core on some Phenom II X3 (Heka) processors. A fresh report suggests that it is possible to enable the complete L3 cache on the Phenom II X4 800 series processors.

The series is AMD's line of Deneb-based 45 nm quad-core processors with 2 MB of L3 cache disabled, leaving 4 MB that can be addressed by the processor. An enthusiast found the Phenom II X4 810 processor to be spontaneously able to address 6 MB of L3 cache, when used on an ASRock AOD790GX /128M motherboard. The most likely cause of this could be "poorly-coded" motherboard BIOS that is able to see the Deneb core "as is". The motherboard was using BIOS version 1.40, that adds Phenom II support. The additional cache was found to have a positive impact on system performance. Beyond that, the enthusiast did not provide an explanation. After clearing the CMOS of the motherboard, it was able to correctly detect the processor with its intended specifications.

Source: XTReview

[Mickie]

Nije mi jasno kako se ovo nije desavalo sa prvim X3 Toilman procesorima a sad se desava. Programiranje BIOS-a nije nazadovalo. Izgleda da AMD to zeli da se desava

[vlajo]

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